| 摘要 |
PROBLEM TO BE SOLVED: To improve the throughput by averaging the penalties involved in next-line prefetch for prefetching instruction.SOLUTION: An increment value register 640 holds an "incremented word count" and an "increment count" as data for addition control of a program counter 660. An addition control section 650 performs addition control over a program counter 660, based on the data held in the addition control register 640. A program counter 660 counts the address of the instruction targeted to be executed and includes a program counter value holding section 661 and an addition section 662. Until the increment count is brought to zero, an addition section 662 adds the value of the incremented word count as an increment value; and the increment count is decremented by "1" each time. In this way, only the instruction of a desired instruction sequence can be executed on a cache line where a plurality of instruction sequences coexist. |
