发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To suppress power consumption associated with charging and discharging of bit-line pair in a semiconductor memory in which a word line contact has an SRAM cell provided in common with the adjacent cells.SOLUTION: The semiconductor memory includes word lines WLA, WLB, SRAM cells MC1, MC2, and a mediation cell DC. The SRAM cell MC1 includes the word lines WLA, WLB and connected with the word line WLA. The SRAM cell MC2 includes the word lines WLA, WLB and connected with the word line WLB. The mediation cell DC is provided adjacent to the SRAM cell MC1 and the SRAM cell MC2 and is connected with the word lines WLA, WLB. The plurality of SRAM cell MC1 and the adjacent cell of the mediation cell DC use the common contact for the word line WLA. The plurality of SRAM cell MC2 and the adjacent cell of the mediation cell DC use the common contact for the word line WLB.
申请公布号 JP2011216664(A) 申请公布日期 2011.10.27
申请号 JP20100083339 申请日期 2010.03.31
申请人 RENESAS ELECTRONICS CORP 发明人 ASAYAMA SHINOBU
分类号 H01L27/11;G11C11/41;H01L21/8244 主分类号 H01L27/11
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