| 摘要 |
PROBLEM TO BE SOLVED: To provide a technique for reducing variance in on voltage of an IGBT (Insulated Gate Bipolar Transistor) by suppressing variations in carrier concentration of a P-type collector layer.SOLUTION: A semiconductor device includes an N-type semiconductor substrate 2 having an MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) structure 1 formed on a surface side, and the P-type collector layer 4 formed on a rear surface of the N-type semiconductor substrate 2. Further, the semiconductor device includes a back electrode 7 having a laminate structure including AlSi electrodes 7a which are formed apart from one another in stripes on the P-type collector layer 4 and are made of Al alloy of Al and Si. |
