发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor device having a reduced parasitic capacitance between wiring and an inductor, while maintaining flatness of a wiring layer. <P>SOLUTION: The semiconductor device includes: a first interlayer insulating film 104 formed on a semiconductor substrate 101; a wiring 106 buried in a portion positioned inside a wiring formation area of the first interlayer insulating film 104; a first dummy pattern 107 buried in a portion positioned inside the wiring formation area of the first interlayer insulating film 104; a second dummy pattern 108 positioned inside an inductor area of the first interlayer insulating film 104; a second interlayer insulating film formed above the first interlayer insulating film 104; and an inductor 111 formed above the second dummy pattern 108 and buried in a portion positioned in the inductor area of the second interlayer insulating film. As the second dummy pattern 108, metal is not formed. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2011233807(A) 申请公布日期 2011.11.17
申请号 JP20100104860 申请日期 2010.04.30
申请人 PANASONIC CORP 发明人 SHIBATA YOSHIYUKI;TOBITA HIROTADA
分类号 H01L21/822;H01L21/3205;H01L21/768;H01L21/82;H01L21/8234;H01L23/52;H01L23/522;H01L27/04;H01L27/06;H01L27/088 主分类号 H01L21/822
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