| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device having enhanced reliability during a setting/resetting operation of a memory cell. <P>SOLUTION: The semiconductor memory device of an embodiment comprises: a memory cell array having a memory cell comprising first wiring, second wiring intersecting the first wiring, and a variable resistance element provided at an intersection part of the first and the second wiring; a data writing part which applies a voltage pulse required for setting and/or resetting data to the memory cell through the first and the second wiring; and a detection part which compares a cell current flowing into the memory cell by application of the voltage pulse during data setting/resetting to a reference current generated from an initial value of the cell current and controls the data writing part according to the comparison result. <P>COPYRIGHT: (C)2012,JPO&INPIT |
