| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device having a withstand voltage structure that hardly causes electric field concentration and can easily cope with a complicated planar pattern. SOLUTION: In this semiconductor device, thin resistance layers 7, 8, 9, 10 and 11 are formed on a selectively oxidized film 27, and loop-like metallic layers 3, 4, 5 and 6 are respectively formed on the resistance layers 7, 8, 9, 10 and 11 through interlayer insulating films 13. In addition, the electric connection between a high-potential electrode 1 and the innermost metallic layer 3, among the metallic layers 3, 4, 5 and 6, and between the outermost metallic layer 6 and a low-potential side electrode 2 are respectively made through the resistance layers 7, 8, 9, 10 and 11. In addition, the low-potential side electrode 2 is electrically connected to a rear-surface side electrode 38 at the end section of a p-type substrate 21 not shown in the figure. |
