发明名称 ACCELERATOR AND DATA PROCESSING METHOD
摘要 <P>PROBLEM TO BE SOLVED: To propose an accelerator and a data processing method for achieving miniaturization, and for improving a processing speed and power efficiency, and for sharply reducing costs to be spent on function correction after manufacturing. <P>SOLUTION: A fusion wire connection logic control circuit is configured of a wire connection logic so that it is possible to achieve miniaturization, and to improve a processing speed and power efficiency. Even if function correction after manufacturing is required due to specification change or design error, redesign of the fusion wire connection logic control circuit itself is not performed by high-order synthesis, but function correction is performed by a patch circuit 5 so that it is possible to reduce costs to that extent. Thus, it is possible to propose an accelerator 1 for achieving miniaturization, and for improving a processing speed and power efficiency, and for sharply reducing costs to be spent on the function correction after manufacturing. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012053507(A) 申请公布日期 2012.03.15
申请号 JP20100193136 申请日期 2010.08.31
申请人 UNIV OF TOKYO 发明人 YOSHIDA HIROAKI;FUJITA MASAHIRO
分类号 G06F17/50 主分类号 G06F17/50
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