发明名称 ERROR CORRECTION CIRCUIT OF PROGRAMMABLE LOGIC CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide an error correction circuit of a programmable logic circuit capable of dynamically performing detection, correction and restoration of an error in a configuration memory, with the error concealed, without influencing the programmable logic circuit. <P>SOLUTION: An error correction circuit 11 includes: a configuration memory 12 where configuration data indicating circuit configuration or wiring configuration of a programmable logic circuit and the error detection encoding data for the configuration data are read out from a base memory M and stored; an error detection unit 131 that detects occurrence of an error on the basis of the configuration data and the error detection encoding data; an alternative storage unit 134 that stores the configuration data prior to the occurrence of the error; a multiplexer unit 133 that switches the configuration data to the configuration data stored by the alternative storage unit 134 in response to error notification; and a reconfiguration control unit 14 that reads out the configuration data from the base memory M and writes the data in the configuration memory 12 for reconfiguration. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012053778(A) 申请公布日期 2012.03.15
申请号 JP20100197048 申请日期 2010.09.02
申请人 SUEYOSHI TOSHINORI 发明人 SUEYOSHI TOSHINORI;IIDA MASAHIRO;AMAGASAKI MOTOKI;ICHINOMIYA YOSHIHIRO
分类号 G06F12/16;H03K19/177 主分类号 G06F12/16
代理机构 代理人
主权项
地址