发明名称 SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor device having a test circuit, which does not require a dedicated wire for each test signal and can reduce a wiring area. <P>SOLUTION: A semiconductor device includes a DFT decoder 202 for decoding test information supplied from the outside to generate multiple signals, multiple DFT registers DFTr0 to DFTrn which are dependently connected to each other, multiple control circuits (control circuits CKT0 to CKTn) corresponding to the multiple DFT registers, respectively, a selector (selector 113) for supplying the multiple signals (shift data TSCANDATA) to a first register (DFT register DFTr0) among the multiple registers, a counter (9 bit counter 112) for prescribing the number of selections by the selector, and a shift clock generation circuit (shift CK control circuit 111) for supplying the number of clock periods corresponding to the number of the multiple control circuits to the multiple registers and the counter. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012127852(A) 申请公布日期 2012.07.05
申请号 JP20100280571 申请日期 2010.12.16
申请人 ELPIDA MEMORY INC;HITACHI ULSI SYSTEMS CO LTD 发明人 NODA HIROMASA;NINOMIYA TOSHIO
分类号 G01R31/28 主分类号 G01R31/28
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