| 摘要 |
<p>PURPOSE:To speed up data read speed by providing an MOS transister (TR) for discharging which discharges the charge on a data line coupled with plural memory cells so as to turn on an MOS TR7 when an address signal changes. CONSTITUTION:An MOS TR(Q)41 is connected between a circuit point S being an input terminal of a sense amplifier 36 and a reference potential point and an output signal from an NOR circuit 49 is inputted to its gate. Further, the output pulse from a pulse generating circuit 45 is inputted to the gate of a Q47 being a driving transistor to the NOR circuit 49 and the output signal from an inverter 44 is inputted to the gate of a Q48 being other driving TR respectively. Further, a signal at a connecting point between the Q46 and Q47, 48 in the NOR circuit 49 is inputted to the gate of the Q41 for discharge as an output signal in this circuit. A threshould voltage of said inverter 44 and a data sense level of the sense amplifier 36 are almost coincident with each other, then the discharge by the Q41 is attained in the vicinity of the sense level of the sense amplifier 36, thereby attaining the detection of data of the sense amplifier 36 in a short time.</p> |
