| 摘要 |
<P>PROBLEM TO BE SOLVED: To initialize the storage state of an SRAM in a short time. <P>SOLUTION: Plural memory cells 100 are provided at intersections of word lines 12 and bit lines 14 L, 14R and each of which stores bits according to the potentials of the bit lines 14 L, 14R when the word line 12 is selected. A control circuit 20 precharges the bit lines 14 L, 14R to H level, and when initialization is instructed, logically inverts H level of the bit line 14R to L level with a NOT circuit 42 for a supply to the bit line 14 L, and then selects the plural word lines 12. <P>COPYRIGHT: (C)2013,JPO&INPIT |
