发明名称 |
SYSTEM AND METHOD FOR ALIGNMENT IN SEMICONDUCTOR DEVICE FABRICATION |
摘要 |
A method of determining overlay error in semiconductor device fabrication includes receiving an image of an overlay mark formed on a substrate. The received image is separated into a first image and a second image, where the first image includes representations of features formed on a first layer of the substrate and the second image includes representations of the features formed on a second layer of the substrate. A quality indicator is determined for the first image and a quality indicator is determined for the second image. In an embodiment, the quality indicators include asymmetry indexes
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申请公布号 |
US2013259358(A1) |
申请公布日期 |
2013.10.03 |
申请号 |
US201213431668 |
申请日期 |
2012.03.27 |
申请人 |
CHEN YEN-LIANG;HUANG TE-CHIH;WANG CHEN-MING;KE CHIH-MING;GAU TSAI-SHENG;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.,("TSMC") |
发明人 |
CHEN YEN-LIANG;HUANG TE-CHIH;WANG CHEN-MING;KE CHIH-MING;GAU TSAI-SHENG |
分类号 |
G06K9/68 |
主分类号 |
G06K9/68 |
代理机构 |
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代理人 |
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