发明名称 IN-SITU BARRIER OXIDATION TECHNIQUES AND CONFIGURATIONS
摘要 PROBLEM TO BE SOLVED: To provide an enhancement-mode gallium nitride-based high electron mobility transistor with reduced traps at an interface between a gate and a channel, an integrated circuit (IC) device, and a manufacturing method thereof.SOLUTION: An embodiment includes: a buffer layer 104 disposed on a substrate 102, the buffer layer including gallium (Ga) and nitrogen (N); a barrier layer 106 disposed on the buffer layer 104, the barrier layer including aluminum (Al) and nitrogen (N), where the barrier layer includes an oxidized portion 110; a gate dielectric 118b disposed on the oxidized portion 110 of the barrier layer 106; and a gate electrode 118a disposed on the gate dielectric 118b. The oxidized portion 110 of the barrier layer 106 is disposed in a gate region between the gate electrode 118a and the buffer layer 104.
申请公布号 JP2013251544(A) 申请公布日期 2013.12.12
申请号 JP20130112730 申请日期 2013.05.29
申请人 TRIQUINT SEMICONDUCTOR INC 发明人 SAUNIER PAUL;ANDREW A KETTERSON
分类号 H01L21/338;H01L21/316;H01L21/336;H01L29/778;H01L29/78;H01L29/812 主分类号 H01L21/338
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