发明名称
摘要 <p><P>PROBLEM TO BE SOLVED: To reduce the risk that Pt or Au reaches an N type Schottky junction interface. <P>SOLUTION: A plurality of trenches 2a are formed over an N- type epitaxial layer 2 on an N+ type semiconductor substrate 1 and a P type impurity is introduced and dispersed via a side surface 2a1 and a bottom surface 2a2 of the trench 2a, thereby forming a guard ring part 4 and a P type layer 5 and forming an oxide film 3 on the side surface 2a1 and the bottom surface 2a2 of the trench 2a. In the oxide film 3, an opening 2b is formed at a portion neighboring to the bottom surface 2a2 of the trench 2a, and Pt or Au 7 is vapor-deposited over all the surface of a semiconductor chip. A poly silicon 8 is deposited over the vapor-deposited Pt or Au 7 to fill the inside of the trench 2a with the poly silicon 8, and the Pt or Au 7 is dispersed under the bottom surface 2a2 of the trench 2a via the opening 3b on the bottom surface 2a2 of the trench 2a. <P>COPYRIGHT: (C)2010,JPO&INPIT</p>
申请公布号 JP5370985(B2) 申请公布日期 2013.12.18
申请号 JP20080242528 申请日期 2008.09.22
申请人 发明人
分类号 H01L21/329;H01L21/322;H01L29/47;H01L29/872 主分类号 H01L21/329
代理机构 代理人
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