| 摘要 |
PROBLEM TO BE SOLVED: To prevent malfunction of a MISFET in a semiconductor device using an SOI substrate to improve reliability of the semiconductor device; and reduce parasitic resistance to improve performance of the semiconductor device.SOLUTION: In a semiconductor device, an epitaxial layer T1 formed on an SOI layer SL on an upper part of an SOI substrate is formed with a wide width so as to cover an end of a top face of an element isolation region STI adjacent to the SOI layer SL. By doing this, a contact plug CP which is out of a formation position is prevented from being connected to a semiconductor substrate SB under the SOI layer SL. In addition, by preventing an end of the SOI layer under the epitaxial layer T1 from being silicide by forming the epitaxial layer T1 with a wide width, an increase in parasitic resistance of a MISFET is prevented. |
