发明名称 MANUFACTURE OF GALLIUM-ARSENIDE SCHOTTKY-BARRIER-JUNCTION-GATE TYPE FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To omit high temperature annealing, by performing selective epitaxial growth of a high concentration n-type GaAs layer only on an n-type GaAs operating layer. CONSTITUTION:On a semi-insulating GaAs substrate 11, an n-type GaAs operating layer 12 and a high-melting-point metal layer 13 are formed. Then, an SiO2 film is deposited on the layers 12 and 13. Anisotropic etching is performed, and only a side wall 16 is made to remain. On the layer 12, a high concentration n-type GaAs layer 15 is epitaxially grown. As a forming method of the layer 15, e.g., an organic metal-vaporp-phase deposition method and a molecular-beam epitaxial deposition method can be used. Then, an ohmic electrode metal film 17 is evaporated in a vacuum, and photoresist 18 is applied. Etching is performed, and the film 17 on the layer 13 and the side wall 16 is exposed. The exposed film 17 is removed by ion milling. Then, the remaining resist 19 is removed, and the film 17 is made to be an alloy. Thus a source electrode and a drain electrode are formed. Since the layer 15 is epitaxially grown, high temperature annealing is not required, and the selecting range for the gate electrode can be expanded.
申请公布号 JPS61220477(A) 申请公布日期 1986.09.30
申请号 JP19850062423 申请日期 1985.03.27
申请人 NEC CORP 发明人 KATANO FUMIAKI
分类号 H01L29/812;H01L21/302;H01L21/3065;H01L21/338;H01L29/80 主分类号 H01L29/812
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