发明名称 |
MULTI-LEVEL OUTPUT CASCODE POWER STAGE |
摘要 |
A power stage to generate an output voltage at one of a high reference voltage, an intermediate reference voltage and a low reference voltage, including a first switch stage connecting the output terminal to the high reference voltage, comprising a pair of transistors connected in series along their source-to-drain paths, a first transistor coupled to the output terminal and having its gate biased at the intermediate voltage, a second transistor having a gate that receives a first stage control signal that varies between the high reference voltage and the intermediate reference voltage, a second switch stage connecting the output terminal to the intermediate reference voltage, having a gate that receives a second stage control signal that varies among the high reference voltage, intermediate reference voltage and low reference voltage, a third switch stage connecting the output terminal to the low reference voltage, having a pair of transistors connected in series along their source-to-drain paths, a first transistor coupled to the output terminal and having its gate biased at the intermediate voltage, a second transistor having a gate that receives a third stage control signal that varies between the intermediate reference voltage and the low reference voltage. |
申请公布号 |
US2015028681(A1) |
申请公布日期 |
2015.01.29 |
申请号 |
US201314063636 |
申请日期 |
2013.10.25 |
申请人 |
LI Dan |
发明人 |
LI Dan |
分类号 |
H03K17/00 |
主分类号 |
H03K17/00 |
代理机构 |
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代理人 |
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主权项 |
1. A power stage to generate an output voltage at one of a high reference voltage, an intermediate reference voltage and a low reference voltage, comprising:
a first switch stage connecting the output terminal to the high reference voltage, comprising a pair of transistors connected in series along their source-to-drain paths, a first transistor coupled to the output terminal and having its gate biased at the intermediate voltage, a second transistor having a gate that receives a first stage control signal that varies between the high reference voltage and the intermediate reference voltage, a second switch stage connecting the output terminal to the intermediate reference voltage, having a gate that receives a second stage control signal that varies among the high reference voltage, intermediate reference voltage and low reference voltage; a third switch stage connecting the output terminal to the low reference voltage, having a pair of transistors connected in series along their source-to-drain paths, a first transistor coupled to the output terminal and having its gate biased at the intermediate voltage, a second transistor having a gate that receives a third stage control signal that varies between the intermediate reference voltage and the low reference voltage. |
地址 |
Shanghai CN |