发明名称 SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To clamp a color difference signal at an optimum DC level by balance- modulating the color difference signal twice by a continuous wave signal and a signal obtained by inverting the continuous wave signal by 180 deg. every prescribed period and detecting the difference of the DC components of the two outputs. CONSTITUTION:The color deference signal inputttede from a terminal 1 is clamped by an automatic clamping circuit 2, the output of the circuit 2 is balance-modulated with a color signal obtained from a carrier generating circuit 6 by a balance modulator BM3 and the color signal is outputted from a terminal 9. The output of the circuit 6 is inverted by 180 deg. at its phase every horizontal period by a phase inverting circuit 7 based on a signal from a timing circuit 8 and the output signal form the circuit 7 and the output signal from the BM 3 are balance-modulated by a BM4. The difference of the DC components in the output signal of the BM4 every horizontal period of a horizontal blanking section of the color difference signal is detected by a detecting circuit 5 based on the signal obtained from the circuit 8 and the DC level of the circuit 2 is controlled by the detecting signal of the circuit 5. Consequently, the color difference signal can be always clamped at the optimum DC level free form carrier leakage and encoded.
申请公布号 JPS62249585(A) 申请公布日期 1987.10.30
申请号 JP19860093775 申请日期 1986.04.23
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HONJO MASAHIRO
分类号 H04N9/72;G11B20/02 主分类号 H04N9/72
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