发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To prevent a short-circuit between a gate electrode and a source or a drain by a method wherein a high-melting point metal film is formed on the whole surface of a substrate including the gate electrode region, the high-melting point metal film formed at the electrode part is removed and a high-melting point metal silicide film is formed on the upper part of the electrode. CONSTITUTION:A high-melting point metal film is formed on the whole on the surface of a substrate 1 including parts of the substrate, which are the forming regions for the gate electrode G, source region S and drain region D of an FET and with the high-melting point metal film formed at the gate electrode G side part formed into an insulating film 7C, or after the high-melting point metal film at that part is removed, Si is combined with a high-melting point metal and high-melting point metal silicide films 7A and 7B are formed on the upper part of the gate electrode and the respective parts on the substrate main, surface, which are forming regions for the region S and the drain region D. As a result, in the case of the formation of the silicide films 7A and 7B, a short-circuit between the electrode G and the region S or D can by prevented because the creeping of the Si can be prevented.
申请公布号 JPS62262460(A) 申请公布日期 1987.11.14
申请号 JP19860104661 申请日期 1986.05.09
申请人 HITACHI LTD 发明人 KATO HISAYUKI;TOMIZAWA ATSUSHI
分类号 H01L29/78 主分类号 H01L29/78
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