发明名称 DISPLAY DRIVER, OPERATING METHOD THEREOF, HOST FOR CONTROLLING THE DISPLAY DRIVER, AND SYSTEM HAVING THE DISPLAY DRIVER AND THE HOST
摘要 An operation method of a display driver includes generating a count value by counting a period of a synchronization signal related to a synchronization packet received from a host, receiving a mode change command from the host, the mode change command indicating a change from a video mode transmitting first image data to a display by bypassing a frame memory to a command mode transmitting second image data to the display through the frame memory, and generating an internal synchronization signal having a period substantially equal to the period of the synchronization signal by using the count value based on the mode change command after a last pulse of the synchronization signal is generated. A time interval between the last pulse and a first pulse of the internal synchronization signal is equal to the period of the synchronization signal.
申请公布号 US2015029201(A1) 申请公布日期 2015.01.29
申请号 US201414513740 申请日期 2014.10.14
申请人 CHA Chi Ho;LEE Sang Kyu;LEE Hyun-Chul;KIM Jong Seon;KIM Hyo Jin;LEE Hak-Seong;IN Seung Jin;CHOI Hyon Jun 发明人 CHA Chi Ho;LEE Sang Kyu;LEE Hyun-Chul;KIM Jong Seon;KIM Hyo Jin;LEE Hak-Seong;IN Seung Jin;CHOI Hyon Jun
分类号 G09G5/00;G09G5/18;G06F1/32;G09G5/12 主分类号 G09G5/00
代理机构 代理人
主权项 1. A method for operating a display driver comprising: generating a count value by counting a period of a synchronization signal related to a synchronization packet received from a host; receiving a mode change command from the host, the mode change command indicating a change from a video mode transmitting first image data to a display by bypassing a frame memory to a command mode transmitting second image data to the display through the frame memory; and generating an internal synchronization signal having a period substantially equal to the period of the synchronization signal by using the count value based on the mode change command after a last pulse of the synchronization signal is generated, a time interval between the last pulse and a first pulse of the internal synchronization signal being equal to the period of the synchronization signal.
地址 Hwaseong-si KR