发明名称 |
Scatter-gather intelligent memory architecture for unstructured streaming data on multiprocessor systems |
摘要 |
A scatter/gather technique optimizes unstructured streaming memory accesses, providing off-chip bandwidth efficiency by accessing only useful data at a fine granularity, and off-loading memory access overhead by supporting address calculation, data shuffling, and format conversion. |
申请公布号 |
US8966180(B2) |
申请公布日期 |
2015.02.24 |
申请号 |
US201313782515 |
申请日期 |
2013.03.01 |
申请人 |
Intel Corporation |
发明人 |
Kim Daehyun;Hughes Christopher J.;Chen Yen-Kuang;Kundu Partha |
分类号 |
G06F12/00;G11C7/10;G06F12/08 |
主分类号 |
G06F12/00 |
代理机构 |
Trop, Pruner & Hu, P.C. |
代理人 |
Trop, Pruner & Hu, P.C. |
主权项 |
1. A processor comprising:
a core including a computation processor and a scatter/gather engine coupled to the computation processor, the scatter/gather engine to generate sub-cache line sized non-sequential data accesses to a system memory based on a data access pattern to the system memory, and to communicate sub-cache line sized data with the system memory, the data access pattern comprising a program defined access pattern, wherein the scatter/gather engine includes an access pattern generator to generate the sub-cache line sized non-sequential data accesses to the system memory based on the program defined access pattern comprising a stride-based access pattern; a cache coupled to the core, data to be transferred between the cache and the system memory using full-cache line sized transfers; and a memory controller coupled between the cache and the system memory. |
地址 |
Santa Clara CA US |