发明名称 Memory and method for storing integrated serial data as divided data in parallel memories, performing read control based on a number of valid memories, and controlling integration of the divided data
摘要 An information memory system in which data received is divided into pieces of data, which are stored in memories in parallel, includes controller configured to storing a number of the divided pieces of data and monitoring a read request and a buffer full notice, in a case where the number of read requests does not reach the number of valid memory units and the buffer full notice continues in all buffers except for one buffer which does not output the read request, performing a read control corresponding to the buffers which output the buffer full notice, and performing control of the integration of a piece of data reconstructed, after being read from the memory unit corresponding to the buffer which does not output the read request and the pieces of data read from the memory units corresponding to the buffers which output the buffer full notice.
申请公布号 US8966168(B2) 申请公布日期 2015.02.24
申请号 US201313748035 申请日期 2013.01.23
申请人 Kabushiki Kaisha Toshiba 发明人 Hanafusa Yuichiro
分类号 G06F13/00;G06F12/02;G06F11/10 主分类号 G06F13/00
代理机构 Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
主权项 1. An information memory system in which data received serially is divided into pieces of data, which are then programmed to and stored in a plurality of flash-memory-equipped large-capacity memory units in parallel, the information memory system including a processor for rebuild configured: to detect an error in a piece of data read from at most one of the plurality of flash-memory equipped large-capacity memory units; and to perform correction and rebuild, and the information memory system configured to integrate the pieces of data read from the flash-memory equipped large-capacity memory units in parallel into integrated serial data, and to output the integrated serial data, the information memory system comprising: a plurality of buffers respectively connected to the plurality of flash-memory equipped large-capacity memory units, each buffer configured to buffer a received piece of read data, to output a read request if the amount of read data buffered in the buffer exceeds a specified buffer amount, and to output a buffer full notice when the buffer buffers the received piece of read data up to its full capacity; and controller configured to store the number of the divided pieces of data as the number of valid memory units, and monitoring the read request and the buffer full notice,in a case where the number of read requests reaches the number of valid memory units, performing read control on all the plurality of flash-memory equipped large-capacity memory units, and controlling the integration of the pieces of read data and the output of the integrated serial data,in a case where the number of read requests does not reach the number of valid memory units and the buffer full notice continues in all the plurality of buffers except for one buffer which does not output the read request, decrementing the number of valid memory units by one, performing the read control on the flash-memory equipped large-capacity memory units corresponding to the buffers which output the buffer full notice, and then performing control of the integration of a piece of data reconstructed by the processor for rebuild after being read from the valid memory units corresponding to the buffer which does not output the read request and the pieces of data read from the valid memory units corresponding to the buffers which output the buffer full notice, and the output of the integrated serial data.
地址 Tokyo JP