发明名称 半導体記憶装置
摘要 Provided is a semiconductor memory device including a plurality of memory cells arranged in a matrix, a plurality of word lines arranged corresponding to each row of the memory cells, a plurality of bit line pairs arranged corresponding to each column of the memory cells, a column selector that selects any of the plurality of bit line pairs based on a column selection signal and connects the selected bit line pair to a data line pair, a precharge circuit that precharges the data line pair, a sense amplifier that amplifies a potential difference of the data line pair, and a control circuit that controls current for driving the sense amplifier based on potentials of the data line pair after a lapse of a specified period from start of amplification of the potential difference of the precharged data line pair by the sense amplifier.
申请公布号 JP5677205(B2) 申请公布日期 2015.02.25
申请号 JP20110131107 申请日期 2011.06.13
申请人 发明人
分类号 G11C11/419 主分类号 G11C11/419
代理机构 代理人
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