发明名称 MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
摘要 In a manufacturing method of sequentially forming a gate electrode film of the MOSFET, forming a gate electrode film of the non-volatile memory FET, patterning the gate electrode of the non-volatile memory FET, and patterning the gate electrode of the MOSFET, in order to form the MOSFET and the non-volatile memory FET on the same semiconductor substrate. The value of the product of S/L and H/L is specified in a case that the line of the gate electrode of the non-volatile memory FET is set to L, the space thereof is set to S, and the height thereof is set to H so that the thickness of a resist film on the gate electrode of the non-volatile memory FET which is formed in advance is set to a thickness which is not lost by etching for forming the gate electrode of the MOSFET.
申请公布号 US2015171103(A1) 申请公布日期 2015.06.18
申请号 US201414572512 申请日期 2014.12.16
申请人 SYNAPTICS DISPLAY DEVICES KK 发明人 ISHIDA Hiroshi;SATO Kazuhiko
分类号 H01L27/115;H01L29/49;H01L21/306;H01L21/28;H01L21/02;H01L21/3213;H01L29/51;H01L21/762 主分类号 H01L27/115
代理机构 代理人
主权项 1. A manufacturing method for a semiconductor device including a non-volatile memory FET and a MOSFET, comprising: (e) forming a first gate electrode film on the entire surface of a semiconductor substrate; (i) opening a region having the non-volatile memory FET formed therein and exposing a semiconductor surface of the semiconductor substrate, after the step (e); (m) forming a charge storage three-layer film by sequentially depositing a first potential barrier film, a charge storage film, and a second potential barrier film, after the step (i); (n) forming a second gate electrode film on the charge storage three-layer film, after the step (m); (o) patterning a gate electrode of the non-volatile memory FET after the step (n); (p) forming a resist film in a region of the non-volatile memory FET and a region having a gate electrode of the MOSFET formed therein, using lithography, after the step (o); and (q) etching the first gate electrode film which is not covered with the resist film formed in the step (p), after the step (p), wherein a value of a product of S/L and H/L is specified in a case that a line of the gate electrode of the non-volatile memory FET is set to L, a space thereof is set to S, and a height thereof is set to H so that in the step (p), a thickness of the resist film on the gate electrode of the non-volatile memory FET is set to a thickness which is not lost by the etching step of the step (q).
地址 Kodaira Tokyo JP