发明名称 LAST BRANCH RECORD INDICATORS FOR TRANSACTIONAL MEMORY
摘要 In one embodiment a processor includes an execution unit and at least one last branch record (LBR) register to store address information of a branch taken during program execution. This register may further store a transaction indicator to indicate whether the branch was taken during a transactional memory (TM) transaction. This register may further store an abort indicator to indicate whether the branch was caused by a transaction abort. Other embodiments are described and claimed.
申请公布号 IN694CHN2013(A) 申请公布日期 2015.07.03
申请号 IN2013CHENP694 申请日期 2013.01.29
申请人 INTEL CORPORATION 发明人 RAJWAR RAVI;KNAUTH LAURA A.;LACHNER PETER;LAI KONRAD K.
分类号 G06F12/00 主分类号 G06F12/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利