| 摘要 |
<p>Design of non-volatile robust, low power and high speed ternary content addressable memory using non-volatile element like magnetic tunnel junction (MTJ) is a challenge. Process variations in MTJ, transistor parameters and voltages like (clock, search inputs and supply voltage) degrade the performance of magnetic content addressable memory (MCAM) as the number of bits increases. To bring M-CAM into practical use for arrays, its cell has to be designed with large tolerance to all types of variations. Reducing the power consumption associated with searching without the increase in delay and area is also essential for the designing of M-CAM. In this invention, the proposed M-CAM cell has less read disturbance, low delay and low power as compared to the reported MTJ based magnetic CAMs. Monte Carlo simulation has been performed for determining the robustness of the proposed M-CAM by considering variations in MTJ, transistor parameters and supply voltage. A VerilogA model of the MTJ along with 45nm CMOS technology is used for the simulation.</p> |
