发明名称 ANALOG SIGNAL GENERATION CIRCUIT
摘要 An analog signal generation circuit is provided. The analog signal generation circuit includes a first control section that generates a first control signal; a second control section that generates a second control signal; current cells, each of the plurality of current cells controlled to generate current or to not generate current based on the first and second control signals; and an analog signal output section that outputs an analog signal generated based on current generated by the current cells. The first control signal includes first and second cell state setting signals. A logical value corresponding to the first cell state setting signal is complementary to a logical value corresponding to the second cell state setting signal. Each current cell has an initialized state based on the first cell state setting signal.
申请公布号 US2015311887(A1) 申请公布日期 2015.10.29
申请号 US201514694409 申请日期 2015.04.23
申请人 KIM Sunjung;KIM Taechan;LEE Seunghoon 发明人 KIM Sunjung;KIM Taechan;LEE Seunghoon
分类号 H03K3/356 主分类号 H03K3/356
代理机构 代理人
主权项 1. An analog signal generation circuit comprising: a first control section configured to generate a first control signal; a second control section configured to generate a second control signal; a plurality of current cells, each of the plurality of current cells configured to be controlled to generate current or not to generate current based on the first control signal and the second control signal; and an analog signal output section configured to output an analog signal generated based on current generated by the plurality of current cells, wherein the first control signal comprises a first cell state setting signal and a second cell state setting signal; wherein the first control section comprises a cell state setting signal generation section configured to generate the first cell state setting signal and the second cell state setting signal in response to an initialization signal; wherein a logical value corresponding to the first cell state setting signal is complementary to a logical value corresponding to the second cell state setting signal; and wherein a current cell selected to be controlled by the first control signal and the second control signal from among the plurality of current cells is configured to have an initialized state based on the first cell state setting signal.
地址 Yongin-si KR