| 摘要 |
<p>PURPOSE: To reduce the number of times of masking stage and simultaneously to eliminate the occurrence of a short circuit among lines and columns by using gates of control transistor as a mask and simultaneously mounting the columns on the surface facing to the surface of the lines. CONSTITUTION: Gate-insulating ladders A are vapor-deposited on semiconductor materials S on vapor-deposited substrates I3 . Metallic gates G of the control transistors T3 are vapor-deposited on the ladders A. The gates G are used as the mask to demarcate semiconductor electrodes II3 which act as a pixel electrode, and the semiconductor materials S are doped. Semiconductor regions, in which sources or drains of transistors T3 facing to vertical bars and lateral bars of the ladders A are formed, remains as slightly doped. In such a manner, an array of the pixel electrodes (line electrodes) II3 demarcated on the substrate I3 is superposed on an array of column electrodes II2 built on the substrates I2 . An electrochemical material is inserted between the substrates I2 and I3 to form a matrix display device.</p> |
