| 摘要 |
The hybrid dynamic-static encoder described herein may combine dynamic and static structural and logical design features that strategically partition dynamic nets and logic to substantially eliminate redundancy and thereby provide area, power, and leakage savings relative to a fully dynamic encoder with an equivalent logic delay. For example, the hybrid dynamic-static encoder may include identical top and bottom halves, which may be combined to produce final encoded index, hit, and multi-hit outputs. Each encoder half may use a dynamic net for each index bit with rows that match a search key dotted. If a row has been dotted to indicate that the row matches the search key, the dynamic nets associated therewith may be evaluated to reflect the index associated with the row. Accordingly, the hybrid dynamic-static encoder may have a reduced set of smaller dynamic nets that leverage redundant pull-down structures across the index, hit, and multi-hit dynamic nets. |
