Transistor with embedded stress-inducing layers

摘要

A method of forming a transistor device is provided, including the subsequently performed steps of forming a gate electrode on a first semiconductor layer, forming an interlayer dielectric over the gate electrode and the first semiconductor layer, forming a first opening in the interlayer dielectric at a predetermined distance laterally spaced from the gate electrode on one side of the gate electrode and a second opening in the interlayer dielectric at a predetermined distance laterally spaced from the gate electrode on another side of the gate electrode, the first and second openings reaching to the first semiconductor layer, forming cavities in the first semiconductor layer through the first and second openings formed in the interlayer dielectric, and forming embedded second semiconductor layers in the cavities.

主权项

1. A method of forming a transistor device, comprising the subsequently performed steps:
forming a gate electrode on a first semiconductor material layer; forming an interlayer dielectric over said gate electrode and said first semiconductor material layer; forming a first opening in said interlayer dielectric at a predetermined distance laterally spaced from said gate electrode on one side of said gate electrode and a second opening in said interlayer dielectric at a predetermined distance laterally spaced from said gate electrode on another side of said gate electrode, said first and second openings reaching to said first semiconductor material layer; forming cavities in said first semiconductor material layer through said first and second openings formed in said interlayer dielectric; and performing at least one epitaxial growth process through said first and second openings to form embedded second semiconductor material layers in said cavities, said embedded second semiconductor material layers completely filling said cavities.