Methods of forming memory arrays

摘要

Some embodiments include methods of forming memory arrays. An assembly is formed which has an upper level over a lower level. The lower level includes circuitry. The upper level includes semiconductor material within a memory array region, and includes insulative material in a region peripheral to the memory array region. First and second trenches are formed to extend into the semiconductor material. The first and second trenches pattern the semiconductor material into a plurality of pedestals. The second trenches extend into the peripheral region. Contact openings are formed within the peripheral region to extend from the second trenches to the first level of circuitry. Conductive material is formed within the second trenches and within the contact openings. The conductive material forms sense/access lines within the second trenches and forms electrical contacts within the contact openings to electrically couple the sense/access lines to the lower level of circuitry.

主权项

1. A method of forming a memory array, comprising:
forming an assembly comprising an upper level over a lower level; the lower level comprising circuitry; the upper level comprising semiconductor material within a memory array region and comprising insulative material laterally outward of the semiconductor material in a region peripheral to the memory array region; forming first trenches extending into the semiconductor material; forming second trenches extending into the semiconductor material; the first and second trenches patterning a plurality of pedestals from the semiconductor material; the second trenches extending into the peripheral region; forming contact openings within the peripheral region and extending downwardly from the second trenches to the first level of circuitry; and forming conductive material within the second trenches and within the contact openings; the conductive material forming sense/access lines within the second trenches and forming electrical contacts within the contact openings to electrically couple the sense/access lines to the lower level of circuitry.