发明名称 SYNCHRONIZING SOURCE SIGNAL CHANGEOVER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a synchronizing source signal changeover circuit that selects and switches any of the clock signals supplied from each of transmission lines to generate an in-device frame signal. SOLUTION: A clock signal selection circuit 120 selects any of clock signals 201 or the like supplied from transmission lines and produces a selected clock signal 220. A frequency divider circuit 130 frequency-divides the selected clock signal 220, to produce a synchronizing source frame signal 220. A phase locked loop oscillator, consisting of a phase comparator circuit 140, a voltage controlled oscillator(VCO) circuit 150 and a frequency divider circuit 160, has the frequency divider circuit 160 and the VCO circuit 150 produce an in-device frame signal 240 and an in-device clock signal 250. A clock signal fault detection circuit 201 or the like detecting a fault in the clock signal 201 or the like allows the clock signal selection circuit 120, to newly select a normal clock signal through a clock signal selection control circuit 110.
申请公布号 JP2001326627(A) 申请公布日期 2001.11.22
申请号 JP20000144855 申请日期 2000.05.17
申请人 NEC CORP 发明人 KUBO NAOTO
分类号 H03K5/00;G06F1/04;H04L7/00;H04L7/033 主分类号 H03K5/00
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