发明名称 Lateral insulated gate bipolar transistor
摘要 A lateral insulated gate bipolar transistor includes a semiconductor substrate including a drift layer, a collector region, a channel layer, an emitter region, a gate insulating layer, a gate electrode, a collector electrode, an emitter electrode, and a barrier layer. The barrier layer is disposed along either side of the collector region and is located to a depth deeper than a bottom of the channel layer. The barrier layer has an impurity concentration that is higher than an impurity concentration of the drift layer. The barrier layer has a first end close to the collector region and a second end far from the collector region. The first end is located between the channel layer and the collector region, and the second end is located on the bottom of the channel layer.
申请公布号 US9214536(B2) 申请公布日期 2015.12.15
申请号 US201314077510 申请日期 2013.11.12
申请人 DENSO CORPORATION 发明人 Takahashi Shigeki;Tokura Norihito;Shiraki Satoshi;Ashida Youichi;Nakagawa Akio
分类号 H01L29/66;H01L29/739;H01L29/06;H01L29/08;H01L29/10;H01L29/40 主分类号 H01L29/66
代理机构 Posz Law Group, PLC 代理人 Posz Law Group, PLC
主权项 1. A lateral insulated gate bipolar transistor comprising: a plurality of cells, each of the plurality of cells including: a semiconductor substrate including a drift layer of a first conductivity type; a collector region of a second conductivity type disposed in a surface portion of the drift layer, the collector region having a longitudinal direction in a predetermined direction; a channel layer of the second conductivity type disposed in the surface portion of the drift layer, the channel layer including a linear portion extending along either side of the collector region; an emitter region of the first conductivity type disposed in a surface portion of the channel layer, an end of the emitter region located inside an end of the channel layer, the emitter region including a linear portion that has a longitudinal direction in the predetermined direction; a gate insulating layer disposed on a surface of the channel layer located between the emitter region and the drift layer; a gate electrode disposed on a surface of the gate insulating layer; a collector electrode electrically coupled with the collector region; an emitter electrode electrically coupled with the emitter region and the channel layer; and a barrier layer of the first conductivity type disposed along either side of the collector region, the barrier layer located to a depth deeper than a bottom of the channel layer, the barrier layer having a first conductivity-type impurity concentration that is higher than a first conductivity-type impurity concentration of the drift layer, the barrier layer having a first end close to the collector region and a second end far from the collector region, the first end located between the channel layer and the collector region, the second end located on the bottom of the channel layer, wherein the plurality of cells includes a first cell and a second cell adjacent to each other, the emitter region and the channel layer in the first cell are arranged along with the emitter region and the channel layer in the second cell, the channel layer in the first cell is located at a predetermined distance from the channel layer in the second cell, the barrier layer includes a linear portion that has a longitudinal direction in the predetermined direction, the barrier layer further includes a corner portion that surrounds a longitudinal end of the collector region, and the corner portion of the barrier layer has a first conductivity type impurity concentration that is lower than a first conductivity type impurity concentration of the linear portion of the barrier layer.
地址 Karyia JP