| 发明名称 |
Handling errors in ternary content addressable memories |
| 摘要 |
Receive a request to write a unit of data, having a first half of bits and a second half of bits, to an index of a ternary content addressable memory (TCAM). Generate a first error-correcting code (ECC) codeword for first bits of the first half of bits of the unit of data and first bits of the second half of bits of the unit of data. Generate a second error-correcting code (ECC) codeword for second bits of the first half of bits of the unit of data and second bits of the second half of bits of the unit of data. Store the first half of bits of the unit of data in the first row of the index. Store the second half of bits of the unit of data in the second row of the index. |
| 申请公布号 |
US9213596(B2) |
申请公布日期 |
2015.12.15 |
| 申请号 |
US201314136041 |
申请日期 |
2013.12.20 |
| 申请人 |
International Business Machines Corporation |
发明人 |
Greenfield Todd A.;Kirscht Joseph A.;Shedivy David A. |
| 分类号 |
G06F11/10;G06F21/64;G06F21/79;G11C29/52;G11C29/08;G11C29/42 |
主分类号 |
G06F11/10 |
| 代理机构 |
|
代理人 |
Williams Robert;Edwards Mark G. |
| 主权项 |
1. A method comprising:
receiving a request to write a unit of data, having a first half of a plurality of bits and a second half of a plurality of bits, to an index of a ternary content addressable memory (TCAM), the index having a first row and a second row; generating a first error-correcting code (ECC) codeword for first bits of the first half of the plurality of bits of the unit of data and first bits of the second half of the plurality of bits of the unit of data; generating a second error-correcting code (ECC) codeword for second bits of the first half of the plurality of bits of the unit of data and second bits of the second half of the plurality of bits of the unit of data; storing the first half of the plurality of bits of the unit of data in the first row of the index; and storing the second half of the plurality of bits of the unit of data in the second row of the index. |
| 地址 |
Armonk NY US |
