发明名称 Nonvolatile semiconductor memory device and method of manufacturing the same
摘要 According to one embodiment, a memory cell string stacked body includes first memory cell transistors above a semiconductor substrate, and second memory cell transistors below a first channel semiconductor film, and one of the first memory cell transistors and one of the second memory cell transistors share with a control gate electrode. The control gate electrodes of the first memory cell transistors cover an upper surface of a first charge storage layer and at least a part of a side surface in a second direction via a first insulating film in the one of the first memory cell transistors. The control gate electrodes of the second memory cell transistors cover only a lower surface of a second charge storage layer via a second insulating film in one of the second memory cell transistors.
申请公布号 US9214234(B2) 申请公布日期 2015.12.15
申请号 US201414150155 申请日期 2014.01.08
申请人 Kabushiki Kaisha Toshiba 发明人 Takekida Hideto
分类号 H01L29/788;G11C16/04;G11C16/12;H01L27/115;H01L29/66 主分类号 H01L29/788
代理机构 Oblon, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, McClelland, Maier & Neustadt, L.L.P.
主权项 1. A nonvolatile semiconductor memory device comprising a first memory cell string stacked body including a first memory cell string having first memory cell transistors serially connected in a first direction above a semiconductor substrate, and a second memory cell string having second memory cell transistors serially connected in the first direction below a first channel semiconductor film, and one of the first memory cell transistors and one of the second memory cell transistors sharing with a first control gate electrode, wherein the first control gate electrode is formed so as to cover an upper surface of a first charge storage layer and at least a part of a side surface in a second direction intersecting the first direction via a first insulating film in the one of the first memory cell transistors, and the first control gate electrode is formed so as to cover only a lower surface of a second charge storage layer via a second insulating film in the one of the second memory cell transistors.
地址 Minato-ku JP