发明名称 |
SEMICONDUCTOR DEVICE AND EVALUATION METHOD OF THE SAME |
摘要 |
PROBLEM TO BE SOLVED: To easily improve a decrease in yield due to a gate leakage fault caused by a pin hole and the like of a gate oxide film in a power transistor without side effects such as an area increase.SOLUTION: In a semiconductor device having a transistor composed of a plurality of unit transistors connected in parallel with each other: gate electrodes of respective unit transistors are connected to first wiring in common to be linked to a first gate input terminal; and source electrodes of respective unit transistors are connected to second wiring in common to be linked to a source input terminal; and drain electrodes of respective unit transistors are connected to third wiring in common to be linked to a drain input terminal; and a first fuse element is arranged between the gate electrode of each unit transistor and the first wiring. |
申请公布号 |
JP2015225990(A) |
申请公布日期 |
2015.12.14 |
申请号 |
JP20140110897 |
申请日期 |
2014.05.29 |
申请人 |
PANASONIC IP MANAGEMENT CORP |
发明人 |
MORIWAKI NOBUYUKI |
分类号 |
H01L21/82;H01L21/822;H01L27/04 |
主分类号 |
H01L21/82 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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