发明名称 PRINTED WIRING BOARD, SEMICONDUCTOR PACKAGE AND PRINTED WIRING BOARD MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To improve flatness of a surface of a printed wiring board and inhibit warpage of the printed wiring board.SOLUTION: A printed wiring board 10 of an embodiment comprises: a first interlayer resin insulation layer 30; a first conductor layer 21 formed on a first surface F1 of the first interlayer resin insulation layer 30; a second conductor layer 25 formed on a second surface F2; a first build-up layer 40 formed on the first surface F1, in which interlayer resin insulation layers and conductor layers are laminated from the first surface F1 side; and a second build-up layer 50 formed on the second surface F2, in which interlayer resin insulation layers and conductor layers are laminated from the second surface F2 side. The first conductor layer 21 is buried in the first interlayer resin insulation layer 30 and has one surface exposed on the first surface F1. A thickness of the second interlayer resin insulation layer 42 adjacent to the first conductor 21 among the interlayer resin insulation layers which compose the first build-up layer 40 is thickest among those of the interlayer resin insulation layers in the first interlayer resin insulation layer 30 and the first and second build-up layers 40, 50.
申请公布号 JP2015225895(A) 申请公布日期 2015.12.14
申请号 JP20140108238 申请日期 2014.05.26
申请人 IBIDEN CO LTD 发明人 FURUYA TOSHIKI;YOSHIKAWA YUKI
分类号 H05K3/46 主分类号 H05K3/46
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