Current Mirror Circuits with Narrow Bandwidth Bias Noise Reduction

摘要

A current mirror circuit includes a first transistor connected to a voltage source, a gate of the first transistor being connected to a drain of the first transistor, a current source connected to the drain and the gate of the first transistor, the current source being configured to generate a predetermined first output current, a sample and hold circuit having an input connected to the gate of the first transistor, a second transistor connected to the voltage source, a gate of the second transistor being connected to an output of the sample and hold circuit, and a controller operatively connected to the sample and hold circuit, the controller being configured to operate the sample and hold circuit at a predetermined sampling frequency to attenuate bias noise from the first transistor in a second output current from the second transistor.

主权项

1. A current mirror circuit comprising:
a first transistor connected to a voltage source, a gate of the first transistor being connected to a drain of the first transistor; a current source connected to the drain and the gate of the first transistor, the current source being configured to generate a predetermined first output current; a sample and hold circuit having an input connected to the gate of the first transistor; a second transistor connected to the voltage source, a gate of the second transistor being connected to an output of the sample and hold circuit; and a controller operatively connected to the sample and hold circuit, the controller being configured to operate the sample and hold circuit at a predetermined sampling frequency to attenuate bias noise from the first transistor in a second output current from the second transistor.