发明名称 DMA CONTROLLER
摘要 PROBLEM TO BE SOLVED: To improve data transfer efficiency in a structure comprising two or more buses.SOLUTION: A DMA controller 50 for transferring data from a source address to a destination address comprises: master ports P1-P4 disposed corresponding to buses, and respectively connected to corresponding buses; an address table 514 for associating addresses of modules connected to the buses with the connected buses and storing them; an identification part 512 for identifying a transfer source bus to which the module of the source address belongs, and a transfer destination bus to which the module of the destination address belongs, by referring to the address table 514; and a transfer control part 502 for setting a path for transferring the data from the source address to the destination address, to the transfer source bus, the master port connected to the transfer source bus, the master port connected to the transfer destination bus, and the transfer destination bus.
申请公布号 JP2015222487(A) 申请公布日期 2015.12.10
申请号 JP20140106365 申请日期 2014.05.22
申请人 YAMAHA CORP 发明人 NISHIOKA NAOTOSHI
分类号 G06F13/36;G06F13/38 主分类号 G06F13/36
代理机构 代理人
主权项
地址