发明名称 DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT
摘要 A decoding method, a memory storage device and a memory control circuit unit are provided. The decoding method includes: sending a read command sequence for reading multiple memory cells so as to obtain multiple first bits; determining whether the first bits have a first error; if the first bits have the first error, executing a first iteration decoding procedure on the first bits so as to obtain multiple second bits, and recording first bit flipping information of the first iteration decoding procedure; determining whether the second bits have a second error; and If the second bits have the at least one second error, executing a second iteration decoding procedure on the second bits according to the first bit flipping information so as to obtain multiple third bits.
申请公布号 US2015358036(A1) 申请公布日期 2015.12.10
申请号 US201414475585 申请日期 2014.09.03
申请人 PHISON ELECTRONICS CORP. 发明人 Tseng Chien-Fu
分类号 H03M13/29 主分类号 H03M13/29
代理机构 代理人
主权项 1. A decoding method, for a rewritable non-volatile memory module comprising a plurality of memory cells, the decoding method comprising: sending a read command sequence for reading the plurality of memory cells so as to obtain a plurality of first bits; determining whether the first bits have at least one first error; if the first bits have the at least one first error, executing a first iteration decoding procedure on the first bits so as to obtain a plurality of second bits, and recording first bit flipping information of the first iteration decoding procedure; determining whether the second bits have at least one second error; if the second bits have the at least one second error, executing a second iteration decoding procedure on the second bits according to the first bit flipping information so as to obtain a plurality of third bits; and if the second bits do not have the at least one second error, outputting the second bits.
地址 Miaoli TW