发明名称 DELAY STRUCTURE FOR A MEMORY INTERFACE
摘要 Systems and methods for delaying a signal are described herein. In one embodiment, a method for delaying a signal comprises receiving a first signal edge, and, in response to receiving the first signal edge, counting a number of oscillations of an oscillator. The method also comprises outputting a second signal edge if the number of oscillations reaches a predetermined number. The second signal edge represents a delayed version of the first signal edge.
申请公布号 WO2015187306(A1) 申请公布日期 2015.12.10
申请号 WO2015US30206 申请日期 2015.05.11
申请人 QUALCOMM INCORPORATED 发明人 DIFFENDERFER, JAN CHRISTIAN;CHENG, YUEHCHUN CLAIRE
分类号 G11C7/10;H03K5/135 主分类号 G11C7/10
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