发明名称 DYNAMICALLY CONFIGURABLE HARDWARE QUEUES FOR DISPATCHING JOBS TO A PLURALITY OF HARDWARE ACCELERATION ENGINES
摘要 A computer system having a plurality of processing resources, including a sub-system for scheduling and dispatching processing jobs to a plurality of hardware accelerators, the subsystem further comprising a job requestor, for requesting jobs having bounded and varying latencies to be executed on the hardware accelerators; a queue controller to manage processing job requests directed to a plurality of hardware accelerators; and multiple hardware queues for dispatching jobs to the plurality of hardware acceleration engines, each queue having a dedicated head of queue entry, dynamically sharing a pool of queue entries, having configurable queue depth limits, and means for removing one or more jobs across all queues.
申请公布号 US2015355948(A1) 申请公布日期 2015.12.10
申请号 US201514827344 申请日期 2015.08.17
申请人 International Business Machines Corporation 发明人 Bass Brian M.;Blaner Bartholomew;Daly, Jr. George W.;Derby Jeffrey H.;Leavens Ross B.;McDonald Joseph G.
分类号 G06F9/50;G06F9/48 主分类号 G06F9/50
代理机构 代理人
主权项 1. A method of managing processing resources in a computer system in which a plurality of co-processors are used to accelerate processing of certain functions, comprising: enqueuing a processing job in a queue management system; scheduling the processing job to execute on one of the plurality of co-processors; dispatching the processing job from a queue to the one of the plurality of co-processors; and terminating a processing job in a queue management system in response to a termination request from the queue management system.
地址 Armonk NY US