Techniques for Accessing a Dynamic Random Access Memory Array

摘要

Examples are disclosed for accessing a dynamic random access memory (DRAM) array. In some examples, sub-arrays of a DRAM bank may be capable of opening multiple pages responsive to a same column address strobe. In other examples, sub-arrays of a DRAM bank may be arranged such that input/output (IO) bits may be routed in a serialized manner over an IO wire. For these other examples, the IO wire may pass through a DRAM die including the DRAM bank and/or may couple to a memory channel or bus outside of the DRAM die. Other examples are described and claimed.

主权项

1. An apparatus comprising:
a dynamic random access memory (DRAM) bank that includes a first group of sub-arrays and a second group of sub-arrays; a group decoder to receive column addresses associated with commands to access the DRAM bank and determine which group of sub-arrays is to be accessed based on the column addresses; a first column address decoder coupled to the first group of sub-arrays, the first column address decoder capable of opening a first page of the DRAM bank responsive to a first command received by the group decoder that has first column addresses assigned to the first group and responsive to a given column address strobe (CAS); and a second column address decoder coupled to the second group of sub-arrays, the second column address decoder capable of opening a second page of the DRAM bank responsive to a second command received by the group decoder that has second column addresses assigned to the second group and responsive to the given CAS.