发明名称 Transitioning from Normal Mode to Low-Power Retention Mode
摘要 A retention mode manager circuit, including: a resistor and a capacitor configured as an RC filter, and the RC filter is configured to receive a retention voltage and output a filtered retention voltage; a retention amplifier configured to receive the filtered retention voltage at a first input terminal and to provide current to a load corresponding to the filtered retention voltage; and a transition amplifier configured to receive the filtered retention voltage and an offset voltage, and to guide the filtered retention voltage to make a transition to the offset voltage while minimizing undershoot or overshoot to prevent a loss of data in the load.
申请公布号 US2015357900(A1) 申请公布日期 2015.12.10
申请号 US201414298390 申请日期 2014.06.06
申请人 QUALCOMM Incorporated 发明人 Nix Michael Arn
分类号 H02M1/08 主分类号 H02M1/08
代理机构 代理人
主权项 1. A retention mode manager circuit, comprising: a resistor and a capacitor configured as an RC filter, and the RC filter is configured to receive a retention voltage and output a filtered retention voltage; a retention amplifier configured to receive the filtered retention voltage at a first input terminal and to provide current to a load corresponding to the filtered retention voltage; and a transition amplifier configured to receive the filtered retention voltage and an offset voltage, and to guide the filtered retention voltage to make a transition to the offset voltage while minimizing undershoot or overshoot to prevent a loss of data in the load.
地址 San Diego CA US