发明名称 SYSTEM AND METHOD FOR VIRTUAL HARDWARE MEMORY PROTECTION
摘要 A memory protection unit including hardware logic. The hardware logic receives a transaction from a virtual central processing unit (CPU) directed at a bus slave, the transaction being associated with a virtual CPU identification (ID), wherein the virtual CPU is implemented on a physical CPU. The hardware logic also determines whether to grant or deny access to the bus slave based on the virtual CPU ID. The virtual CPU ID is different than an ID of the physical CPU on which the virtual CPU is implemented.
申请公布号 US2015356046(A1) 申请公布日期 2015.12.10
申请号 US201514827077 申请日期 2015.08.14
申请人 Texas Instruments Incorporated 发明人 Chavali Balatripura Sodemma;Greb Karl Friedrich;Suvarna Rajeev
分类号 G06F13/40;G06F13/42 主分类号 G06F13/40
代理机构 代理人
主权项 1. An integrated circuit comprising: a bus slave having a resource; a central processing unit (CPU) configured to implement a virtual CPU (VCPU) having a VCPU identification (ID) indicating a safety level associated with a transaction request of the VCPU for accessing the resource; and a protection unit coupled between the bus slave and the CPU, the protection unit configured to either grant or deny the transaction request based on the safety level indicated by the VCPU ID.
地址 Dallas TX US