发明名称 Embedded non-volatile memory cell with charge-trapping sidewall spacers
摘要 An IC includes both "volatile" CMOS transistors (FETs) and embedded non-volatile memory (NVM) cells, both including polysilicon gate structures, sidewall oxide layers, sidewall spacer structures, and source/drain regions. The sidewall spacers of both the NVM cells and the FETs are made up of a spacer material with local charge storage nodes that is capable of storing electrical charge (e.g., silicon-nitride with traps or oxide with silicon nanocrystals). The source/drain regions of the NVM cells omit lightly-doped drains (which are used in the CMOS FETs), and the NVM cells are formed with thinner sidewall oxide layers than the CMOS FETs to facilitate programming/erasing operations. A production method includes a modified CMOS process flow where the CMOS FET gate structures receive different source/drain diffusions and oxides than the NVM gate structures, but both receive substantially identical sidewall spacers, which are used as charge storage structures in the NVM cells.
申请公布号 US7482233(B2) 申请公布日期 2009.01.27
申请号 US20070753493 申请日期 2007.05.24
申请人 TOWER SEMICONDUCTOR LTD. 发明人 ROIZIN YAKOV;FENIGSTEIN AMOS
分类号 H01L21/8234 主分类号 H01L21/8234
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