| 摘要 |
Memory depth optimization in communications systems with ensemble PHY layer requirements. Memory depth, for one or more modules in a communication device, is managed based on a limited amount of provisioned hardware. For example, each of a number of various modules within a communication device is configurable to operate at various memory depths. Considered together, various sets or profiles of operational parameters (e.g., associated with particular settings for each of the various modules within the communication device), may be employed to configure the communication device to operate in accordance with one of a variety of operational modes. For example, in a first operational mode, latency may be minimized (e.g., using shorted codewords, shorter interleaver depth, etc.), whereas in a second operational mode, a higher latency may be tolerated but with an expectation of much lower error rates (e.g., achieved using more powerful ECC, longer interleaver depth, etc.). |
| 主权项 |
1. An apparatus comprising:
an encoder to encode a plurality of information bits in accordance with any one of a plurality of memory depths thereby generating a plurality of signals; a processor, coupled to the encoder, to perform memory optimization including selecting a corresponding memory depth employed by the encoder for generating each of the plurality of signals; and a transmitter, coupled to at least one communication channel, to transmit the plurality of signals respectively via a plurality of service flows, wherein the plurality of memory depths is limited by a predetermined total memory depth that allows at least one but less than all of the plurality of signals to be encoded in accordance with a maximum per signal memory depth. |
