发明名称 Switch driver circuit and associated methods
摘要 A driver circuit for driving a switch includes a high output impedance driver circuit portion having a high impedance output node coupled to the control terminal of the transistor and a low output impedance driver circuit portion having a low impedance output node also coupled to the control terminal of the transistor. The slew rate of the control signal is established by at least one of the high impedance driver circuit portion and the low impedance driver circuit portion.
申请公布号 US9379708(B2) 申请公布日期 2016.06.28
申请号 US201514677029 申请日期 2015.04.02
申请人 Allegro Microsystems, LLC 发明人 Martin William E.;Humphrey George P.
分类号 H03K19/017;H03K19/0175;H03K19/0185;H05B33/08 主分类号 H03K19/017
代理机构 Daly, Crowley, Mofford & Durkee, LLP 代理人 Daly, Crowley, Mofford & Durkee, LLP
主权项 1. A driver circuit for driving a transistor having a control terminal responsive to a control signal having a slew rate during a slew time interval, comprising: a first driver circuit portion having a first output node coupled to the control terminal of the transistor, a first output impedance, a first input responsive to a feedback signal, a second input responsive to a reference signal, and configured to generate an output signal at the first output node, wherein the first driver circuit portion further comprises a differential amplifier comprising the first input and the second input and a current mirror coupled to an output of the differential amplifier; and a second driver circuit portion having a second output node coupled to the control terminal of the transistor and having a second output impedance, lower than the first output impedance, wherein the slew rate of the control signal is established by at least one of the first driver circuit portion and the second driver circuit portion, wherein the second driver circuit portion comprises a pre-driver circuit coupled to the first driver circuit portion and a transistor having a control terminal and an output terminal, wherein the control terminal of the transistor is responsive to the pre-driver circuit and the output terminal of the transistor provides the second output node, wherein the second driver circuit portion further comprises a switch configured to be in a first position to enable the pre-driver circuit or in a second position to disable the pre-driver circuit portion, wherein the slew rate of the control signal is established by the first driver circuit portion and the second driver circuit portion during a first portion of the slew time interval when the switch is in the first position and wherein the slew rate of the control signal is not established by the second driver circuit portion during a second portion of the slew time interval, following the first portion of the slew time interval when the switch is in the second position.
地址 Worcester MA US