发明名称 Ultra high voltage regulator
摘要 An ultra high voltage regulator for converting includes a rectifying circuit, a first transistor, a second transistor, an output capacitor, a first resistor, a second resistor, and a third resistor. The ultra high voltage regulator converts a received alternative current into a direct voltage to an electrical component. The ultra high voltage regulator capable of providing a larger current becomes more compact and thinner in size without cooperating with a mass transformer/high voltage capacitor, which satisfies the request for miniaturization of the electrical components.
申请公布号 US9379637(B2) 申请公布日期 2016.06.28
申请号 US201414571311 申请日期 2014.12.16
申请人 DiWIN technology CO. LTD 发明人 Hsu Ching-Yueh
分类号 H02M7/217 主分类号 H02M7/217
代理机构 ScienBiziP, P.C. 代理人 ScienBiziP, P.C.
主权项 1. An ultra high voltage regulator comprising: an input terminal configured to receive an alternating current; an output terminal configured to provide a direct voltage to an electrical component; a rectifying circuit configured to generate a rectifying signal based on the received alternating current; a first transistor including a first reference terminal, a first driving terminal, and a first controlling terminal; a second transistor including a second reference terminal connected to the rectifying circuit for receiving the rectifying signal, a second controlling terminal connected to the first reference terminal, and a second driving terminal connected to the output terminal; an output capacitor with a terminal connected between the second driving terminal and the electrical component and an opposite terminal connected to the ground; a first resistor with two opposite terminals respectively connected to the second driving terminal and the first controlling terminal; a second resistor with two opposite terminals respectively connected to the first controlling terminal and the ground; and a third resistor two opposite terminals respectively connected to the second controlling terminal and the second reference terminal; wherein a divided voltage at a node between the first and second resistors is directly output to the first controlling terminal of the first transistor.
地址 Taoyuan TW