发明名称 フィルタ回路およびフィルタ回路を含む集積回路
摘要 <p>A filter circuit includes a plurality of shifting units configured to each store an initial value, receive at least one input signal, and shift the stored value to a next shifting unit in sequence from among the shifting units in response to at least one input signal, and an initial value setting unit configured to set the initial stored values of the shifting units to different sets of initial stored values in response to different filter setting signals, respectively, wherein the different filter setting signals represent respectively different criteria for filtering the at least one input signal, wherein the initially stored values have a first logic value or a second logic value, wherein the filter circuit is configured to activate an output signal when the first logic value is shifted to a selected shifting unit among the plurality of shifting units.</p>
申请公布号 JP5829829(B2) 申请公布日期 2015.12.09
申请号 JP20110088413 申请日期 2011.04.12
申请人 エスケーハイニックス株式会社SKhynix Inc. 发明人 崔 海 郎;金 龍 珠
分类号 H03H17/06 主分类号 H03H17/06
代理机构 代理人
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